Low Latency Access to Phase Change Memory in OpenPOWER Systems


Abstract to be presented at Summit 2016

Novel forms of nonvolatile memory (NVM), such as phase change memory (PCM), promise low, DRAM-like latency and small granularity read/write access at high storage density. These characteristics make them highly desirable for high capacity memory applications such as in-memory databases and in-memory processing. CPU access to new NVM can be achieved through the PCI Express link, however this entails high latency which hides the speed advantages of new NVM. The POWER processor architecture with its CAPI interface offers relief by providing an efficient communication mechanism over PCIe. In this work we demonstrate a PCM-based memory sub-system attached via CAPI to a Power8 processor. Our platform consists of a Power8 server (S824L), a Xilinx FPGA card (Alpha-Data), and custom DIMMs made of 128Mb PCM chips (Micron P5Q).  By leveraging the small granularity R/W access of PCM and the efficiency of the CAPI protocol, we demonstrate 128-byte read/write operations from/to PCM at very low latency. We will provide read/write performance measurements under various workloads and comparative performance results with a native PCIe PCM-based solid state drive prototype.

Speaker Bio

Nikolaos Papandreou is a Research Staff Member at IBM Research – Zurich. He received his Diploma and Ph.D. degree, both in Electrical and Computer Engineering, from the University of Patras, Greece, in 1998 and 2004 respectively. He joined the IBM Zurich Research Laboratory in July 2008, where he is working on non-volatile memory technologies with a focus on flash and phase change memory. His current research interests include device characterization and reliability, signal processing and coding for non-volatile memories, memory controller design and architecture.